Union Minister of State for Skill Development & Entrepreneurship and Electronics & IT Shri Rajeev Chandrasekhar, virtually addressed the Digital India RISC-V (DIR-V) Symposium organised by IIT Madras in Chennai.
- The DI—V program, launched last year, aims to boost India’s semiconductor ecosystem by creating advanced microprocessors.
- The Minister spoke about how DIR-V will create tech opportunities for every player in the industry and that it will play a vital role in achieving India’s techade goals.
- ‘RISC’ stands for ‘Reduced Instruction Set Computer’ and ‘V’ stands for the fifth generation. The RISC-V project began in 2010.
- The RISC-V ISA enables a new era of processor innovation through open standard collaboration and aims to deliver a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
- Prof Kamakoti developed ‘SHAKTI,’ India’s first indigenously-designed microprocessor based on RISC-V ISA.
