Minister of State for Electronics and Information Technology Rajeev Chandrasekhar has launched Digital India RISC-V Microprocessor (DIR-V) Program.
Salient features
- Its overall aim is to enable the creation of Microprocessors for the future in India, for the world and achieve industry-grade silicon and Design wins by December 2023.
- DIR-V program will see partnerships between Startups, Academia and Multinationals, to make India not only a RISC-V Talent Hub for the World but also supplier of RISC-V System on Chips for Servers, Mobile devices, Automotive and Microcontrollers across the globe.
SHAKTI and VEGA
- He also unveiled not only the Blueprint of the roadmap of design & implementation of the DIR-V Program with – SHAKTI Processor by IIT Madras and VEGA Processor by C-DAC but also the strategic Roadmap for India’s Semiconductor Design & Innovation to catalyze the semiconductor ecosystem in the country.
- RISC-V has emerged as a strong alternative ARM and x-86. Ministry of Electronics and IT has also announced a plan to join the RISC-V International as Premiere Board Member to collaborate, contribute and advocate India’s expertise with other global RISC-V leaders.
About Microprocessor
- Computer’s Central Processing Unit (CPU) built on a single Integrated Circuit (IC) is called a microprocessor.
- A digital computer with one microprocessor which acts as a CPU is called microcomputer.
- The microprocessor contains millions of tiny components like transistors, registers, and diodes that work together.
About Instruction Set Architecture (ISA)
- An Instruction Set Architecture (ISA) is part of the abstract model of a computer that defines how the CPU is controlled by the software.
- The ISA acts as an interface between the hardware and the software, specifying both what the processor is capable of doing as well as how it gets done.
- A realization of an ISA, such as a Central Processing Unit (CPU), is called an implementation.
- Widely used ISAs include x86 and ARM, older systems like SPARC and VAX, and early microprocessors like the Z80 and 6502.
About RISC-V
- RISC-V is an ISA based on reduced instruction set computer (RISC) principles. Unlike most other ISA designs, it is provided under a open source license that does not require fees to use.
- The project started in 2010 at the University of California, Berkeley along with volunteer contributors not affiliated with the university.
- It was recently renamed RISC-V International, incorporated in Switzerland.
GS TIMES UPSC PRELIMS & MAINS CURRENT AFFAIRS BASED BASICS DAILY ONLINE TEST CLICK HERE
CLICK HERE DAILY CURRENT AFFAIRS QUIZ FOR STATE CIVIL SERVICES
